The present invention relates a method and an apparatus for correcting offset and gain errors occurring in FM broadcast receivers. More particularly, the present invention relates to a system of adders and accumulators which are configured to correct for offset and gain errors.
The zero IF receiver concept for FM reception relies on linear measurements of the in-phase signal, I, and the quadrature phase signal, Q. To compensate for different station signal strengths, the I and Q analog signals are amplified by an amount varying inversely with the strength of the desired signal. Analog programmable gain circuits, however, are susceptibel to errors in offset and relative gain. Offset and gain errors show up in the received signal as a reduced signal-to-noise ratio. To generate the best reception possible, it is therefore desirable to reduce offset errors in the in-phase and quadrature phase singals to zero, or to a vlue smaller than the quantification level of the system. Additionally, to produce the best reception, it is desirable to cause the in-phase and quadrature phase signals to be amplified by the same amounts. Prior efforts at achieving these objectives have concentrated on designing analog sections for the in-phase and quadrature phase gain stages from high quality, low tolerance analog components which have small offset and matched gain.
However, if one wishes to construct such receiver circuitry on an integrated circuit chip, the high quality design of the analog circuitry for the in-phase and quadrature phase signal paths becomes a problem. In such integrated circuit analog designs, the circuit paths typically do not exhibit zero offset or matched gain. Accordingly, it is an object of the present invention to provide a digital correction mechanism for on-chip analog circuits so as to improve the signal quality with inexpensive analog and digital circuitry implemented on a single circuit chip.